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Cirrus Logic Design Verification Engineer Salary

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Cirrus Logic Design Verification Engineer average salary is $100,815, median salary is $92,800 with a salary range from $74,550 to $145,000.
Cirrus Logic Design Verification Engineer salaries are collected from government agencies and companies. Each salary is associated with a real job position. Cirrus Logic Design Verification Engineer salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Low
74,550
Average
100,815
Median
92,800
High
145,000
Total 10 Cirrus Logic Salaries. Sorted by Salary, page 1
Ranked By:
Jobtitle Company Salary City Year
Design Verification Engineer Cirrus Logic $145,000 Austin, TX, 73301 08/03/2015
Design Verification Engineer Cirrus Logic $122,000 Austin, TX, 73301 09/16/2016
Design Verification Engineer Cirrus Logic $120,000 Austin, TX, 73301 06/13/2016
Design Verification Engineer Cirrus Logic $103,000 Austin, TX, 73301 08/02/2010
Design Verification Engineer Cirrus Logic $93,600 Austin, TX, 73301 09/09/2015
Design Verification Engineer Cirrus Logic $92,000 Austin, TX, 73301 08/25/2016
Design Verification Engineer Cirrus Logic $87,500 Austin, TX, 73301 09/10/2014
Design Verification Engineer Cirrus Logic $87,500 Austin, TX, 73301 08/23/2016
Design Verification Engineer Cirrus Logic $83,000 Austin, TX, 73301 09/10/2014
Design Verification Engineer Cirrus Logic $74,550 Austin, TX, 73301 06/01/2011
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Cirrus Logic Design Verification Engineer salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.

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