Staff Asic Design Verification Engineer (asic Dv E Salary

Staff Asic Design Verification Engineer (asic Dv E average salary is $140,407, median salary is $140,000 with a salary range from $126,628 to $155,000.
Staff Asic Design Verification Engineer (asic Dv E salaries are collected from government agencies and companies. Each salary is associated with a real job position. Staff Asic Design Verification Engineer (asic Dv E salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.

Low: 126,628

Average: 140,407

Median: 140,000

High: 155,000

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Company	Salaries	City	Year	More info
Smartplay	126,628-155,000	San Diego, CA, 92101	2013	Smartplay Staff Asic Design Verification Engineer (asic Dv E Salaries (8) Staff Asic Design Verification Engineer (asic Dv E San Diego, CA Salaries
Smartplay	126,628-155,000	San Jose, CA, 95101	2013	Smartplay Staff Asic Design Verification Engineer (asic Dv E Salaries (8) Staff Asic Design Verification Engineer (asic Dv E San Jose, CA Salaries
Smartplay	140,000-140,000	Austin, TX, 73301	2013	Smartplay Staff Asic Design Verification Engineer (asic Dv E Salaries (8) Staff Asic Design Verification Engineer (asic Dv E Austin, TX Salaries

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Staff Asic Design Verification Engineer (asic Dv E salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.

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