- Low
- 58,350
- Average
- 58,350
- Median
- 58,350
- High
- 58,350
| Jobtitle | Company | Salary | City | Year |
| Design Engineer/cae Analyst | Integrated Memory Logic | $ 58,350 | SAN JOSE, CA, 95110 | 03/01/2013 |
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Integrated Memory Logic Design Engineer/cae Analyst salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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