- Low
- 100,000
- Average
- 117,000
- Median
- 110,000
- High
- 145,000
Sacc Asic Design Verification Engineer Salary
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47
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Sacc Asic Design Verification Engineer average salary is $117,000, median salary is $110,000 with a salary range from $100,000 to $145,000.
Sacc Asic Design Verification Engineer salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sacc Asic Design Verification Engineer salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Sacc Asic Design Verification Engineer salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sacc Asic Design Verification Engineer salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Jobtitle | Company | Salary | City | Year |
| Asic Design Verification Engineer | Sacc | $ 110,000 | Mountain View, CA, 94035 | 03/25/2016 |
| Asic Design Verification Engineer | Sacc | $ 110,000 | San Diego, CA, 92101 | 04/06/2016 |
| Asic Design Verification Engineer | Sacc | $ 100,000 | Santa Clara, CA, 95050 | 05/24/2016 |
| Asic Design Verification Engineer | Sacc | $ 145,000 | Mountain View, CA, 94035 | 05/24/2016 |
| Asic Design Verification Engineer | Sacc | $ 120,000 | San Diego, CA, 92101 | 09/19/2016 |
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Sacc Asic Design Verification Engineer salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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