Sr. Asic Verification & Design Engineer Salary

Sr. Asic Verification & Design Engineer average salary is $107,734, median salary is $100,000 with a salary range from $100,000 to $123,200.
Sr. Asic Verification & Design Engineer salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sr. Asic Verification & Design Engineer salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.

Low: 100,000

Average: 107,734

Median: 100,000

High: 123,200

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Company	Salaries	City	Year	More info
Zf Sachs Automotive Of America	123,200-123,200	Santa Clara, CA, 95050	2018	Zf Sachs Automotive Of America Sr. Asic Verification & Design Engineer Salaries (3) Sr. Asic Verification & Design Engineer Santa Clara, CA Salaries
Zf Sachs Automotive Of America	100,000-100,000	Santa Clara, CA, 95050	2017	Zf Sachs Automotive Of America Sr. Asic Verification & Design Engineer Salaries (3) Sr. Asic Verification & Design Engineer Santa Clara, CA Salaries
Zf Sachs Automotive Of America	100,000-100,000	Santa Clara, CA, 95050	2016	Zf Sachs Automotive Of America Sr. Asic Verification & Design Engineer Salaries (3) Sr. Asic Verification & Design Engineer Santa Clara, CA Salaries

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Sr. Asic Verification & Design Engineer salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.

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