- Low
- 108,992
- Average
- 108,992
- Median
- 108,992
- High
- 108,992
Jobtitle | Company | Salary | City | Year |
Sr. Analog Rfic Design Engineer | Situne | $ 108,992 | San Jose, CA, 95101 | 09/01/2016 |
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Situne Sr. Analog Rfic Design Engineer salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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