- Low
- 104,706
- Average
- 104,853
- Median
- 104,853
- High
- 105,000
Smartplay Lead Asic Design Verification Engineers (asic Dv E Salary
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Smartplay Lead Asic Design Verification Engineers (asic Dv E average salary is $104,853, median salary is $104,853 with a salary range from $104,706 to $105,000.
Smartplay Lead Asic Design Verification Engineers (asic Dv E salaries are collected from government agencies and companies. Each salary is associated with a real job position. Smartplay Lead Asic Design Verification Engineers (asic Dv E salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Smartplay Lead Asic Design Verification Engineers (asic Dv E salaries are collected from government agencies and companies. Each salary is associated with a real job position. Smartplay Lead Asic Design Verification Engineers (asic Dv E salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Jobtitle | Company | Salary | City | Year |
| Lead Asic Design Verification Engineers (asic Dv E | Smartplay | $ 104,706 | San Jose, CA, 95101 | 08/01/2014 |
| Lead Asic Design Verification Engineers (asic Dv E | Smartplay | $ 104,706 | San Jose, CA, 95101 | 09/01/2014 |
| Lead Asic Design Verification Engineers (asic Dv E | Smartplay | $ 105,000 | San Diego, CA, 92101 | 03/17/2014 |
| Lead Asic Design Verification Engineers (asic Dv E | Smartplay | $ 105,000 | San Jose, CA, 95101 | 03/17/2014 |
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Smartplay Lead Asic Design Verification Engineers (asic Dv E salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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