- Low
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- Average
- 160,000
- Median
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- High
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Senior Full-chip Static Timing Analysis Engineer (mts) Salary
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Senior Full-chip Static Timing Analysis Engineer (mts) average salary is $160,000, median salary is $- with a salary range from $- to $-.
Senior Full-chip Static Timing Analysis Engineer (mts) salaries are collected from government agencies and companies. Each salary is associated with a real job position. Senior Full-chip Static Timing Analysis Engineer (mts) salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Senior Full-chip Static Timing Analysis Engineer (mts) salaries are collected from government agencies and companies. Each salary is associated with a real job position. Senior Full-chip Static Timing Analysis Engineer (mts) salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Company | Salaries | City | Year | More info |
| Talix | 160,000-160,000 | Santa Clara, CA, 95050 | 2017 | Talix Senior Full-chip Static Timing Analysis Engineer (mts) Salaries (1) Senior Full-chip Static Timing Analysis Engineer (mts) Santa Clara, CA Salaries |
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Senior Full-chip Static Timing Analysis Engineer (mts) salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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