- Low
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- Average
- 121,065
- Median
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- High
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Sr. Asic Design Engineer (sr. Asic Verification Engineer) Salary
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Sr. Asic Design Engineer (sr. Asic Verification Engineer) average salary is $121,065, median salary is $- with a salary range from $- to $-.
Sr. Asic Design Engineer (sr. Asic Verification Engineer) salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sr. Asic Design Engineer (sr. Asic Verification Engineer) salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Sr. Asic Design Engineer (sr. Asic Verification Engineer) salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sr. Asic Design Engineer (sr. Asic Verification Engineer) salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Company | Salaries | City | Year | More info |
| Infinera | 121,065-121,065 | Sunnyvale, CA, 94086 | 2017 | Infinera Sr. Asic Design Engineer (sr. Asic Verification Engineer) Salaries (1) Sr. Asic Design Engineer (sr. Asic Verification Engineer) Sunnyvale, CA Salaries |
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Sr. Asic Design Engineer (sr. Asic Verification Engineer) salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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