- Low
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- Average
- 133,203
- Median
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- High
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Standard Cell Library Design Engineer/ Asic Design Salary
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Standard Cell Library Design Engineer/ Asic Design average salary is $133,203, median salary is $- with a salary range from $- to $-.
Standard Cell Library Design Engineer/ Asic Design salaries are collected from government agencies and companies. Each salary is associated with a real job position. Standard Cell Library Design Engineer/ Asic Design salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Standard Cell Library Design Engineer/ Asic Design salaries are collected from government agencies and companies. Each salary is associated with a real job position. Standard Cell Library Design Engineer/ Asic Design salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Company | Salaries | City | Year | More info |
| Apple | 133,203-133,203 | Cupertino, CA, 95014 | 2014 | Apple Standard Cell Library Design Engineer/ Asic Design Salaries (1) Standard Cell Library Design Engineer/ Asic Design Cupertino, CA Salaries |
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Standard Cell Library Design Engineer/ Asic Design salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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英文助理-专利流程类工资Intellectual Property Engineer 知识产权工程师工资涉外专利代理人（化学）工资 Standard Cell Library Desig... Jobs
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