- Low
- 22,069
- Average
- 102,349
- Median
- 96,800
- High
- 1,309,656
Sr. Asic Design Verification Engineer Sunnyvale, CA Salary
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Sr. Asic Design Verification Engineer Sunnyvale, CA average salary is $102,349, median salary is $96,800 with a salary range from $22,069 to $1,309,656.
Sr. Asic Design Verification Engineer Sunnyvale, CA salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sr. Asic Design Verification Engineer Sunnyvale, CA salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Sr. Asic Design Verification Engineer Sunnyvale, CA salaries are collected from government agencies and companies. Each salary is associated with a real job position. Sr. Asic Design Verification Engineer Sunnyvale, CA salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Jobtitle | Company | Salary | City | Year |
| Sr. Asic Design Verification Engineer | Zf Sachs Automotive Of America | $ 75,000 | Sunnyvale, CA, 94086 | 08/28/2013 |
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Sr. Asic Design Verification Engineer Sunnyvale, CA salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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