- Low
- 29,000
- Average
- 101,565
- Median
- 98,342
- High
- 480,000
Engineer, Design Verification Test Santa Clara, CA Salary
32
67
90
Engineer, Design Verification Test Santa Clara, CA average salary is $101,565, median salary is $98,342 with a salary range from $29,000 to $480,000.
Engineer, Design Verification Test Santa Clara, CA salaries are collected from government agencies and companies. Each salary is associated with a real job position. Engineer, Design Verification Test Santa Clara, CA salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
Engineer, Design Verification Test Santa Clara, CA salaries are collected from government agencies and companies. Each salary is associated with a real job position. Engineer, Design Verification Test Santa Clara, CA salary statistics is not exclusive and is for reference only. They are presented "as is" and updated regularly.
| Jobtitle | Company | Salary | City | Year |
| Engineer, Design Verification Test | Marvell Semiconductor | $ 86,577 | Santa Clara, CA, 95050 | 08/17/2014 |
| Engineer, Design Verification Test | Marvell Semiconductor | $ 68,000 | Santa Clara, CA, 95050 | 08/21/2013 |
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Engineer, Design Verification Test Santa Clara, CA salary is full-time annual starting salary. Intern, contractor and hourly pay scale vary from regular exempt employee. Compensation depends on work experience, job location, bonus, benefits and other factors.
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